Most of silicon wafers used widely as substrates of semiconductor devices are manufactured from a silicon single crystal grown-in a Czochralski (CZ) method. The silicon single crystal grown-in the CZ method contains interstitial oxygen as impurities at concentration of about 1018 atoms/cm3. The interstitial oxygen turns into a supersatulated state in a thermal history from solidification of a melt till cooling down thereof to room temperature during a crystal growth step (hereinafter which may be referred to as a crystal thermal history) or in a heat treatment step of a fabrication process of semiconductor devices to then precipitate, precipitates of silicon oxides (hereinafter may be referred to as oxide precipitates or simply precipitates) being generated.
The oxide precipitates work effectively as sites capturing heavy metal impurities contaminated in a device fabrication process. This is called internal gettering (hereinafter may be referred to as IG or simply gettering) and improves device characteristics and a yield. For this reason, an IG capability is valued highly as one of properties of a silicon wafer.
The process of oxygen precipitation includes formation of precipitation nuclei and their growth. Usually formation of nuclei progresses during a crystal thermal history, and then the nuclei grow greatly in heat treatment of the following device fabrication process and others, the grown nuclei being detected as oxide precipitates. For this reason, the precipitation nuclei generated during the crystal thermal history are referred to as grown-in precipitation nuclei. As a matter of course, oxygen precipitation nuclei may be generated in subsequent heat treatment.
A usual as-grown wafer (a wafer subjected to no heat treatment except for general oxygen donor anihilation heat treatment) has no IG capability because oxygen precipitation nuclei existing at a stage prior to a device fabrication process are extremely small. However, after the as-grown wafer has been subjected to the device fabrication process, the nuclei grow to large oxide precipitates and then the wafer has an IG capability.
Since density of oxygen precipitation nuclei generated during a crystal thermal history depends on the length of the thermal history, there arises a problem that the density is largely fluctuated according to crystal pulling conditions such as a pulling rate or a position in the direction of a crystal growth axis. For example, in a process producing one crystal, a portion grown-in a latter half thereof has lower density of oxygen precipitation nuclei because of a shorter thermal history. This causes a fluctuation in density of oxygen precipitation nuclei to be generated during a device fabrication process, resulting in a fluctuation in an IG capability.
On the other hand, when oxide precipitates exist in a device fabrication region in the vicinity of a wafer surface, degradation of the device characteristics occurs. For this reason, in order to prevent progress in oxygen precipitation by Out-diffusing oxygen in the vicinity of the wafer surface, the wafer may be heat-treated at 1100° C. or higher for several hours. In this case, most of grown-in precipitation nuclei are annihilated and thereby, oxide precipitates are not generated in the following device fabrication process.
Therefore, in order to regenerate oxygen precipitation nuclei, the wafer is subjected to heat treatment at about 650° C. for a long time on the order of 3 hrs to 30 hrs. Further, in order to grow the regenerated oxygen precipitation nuclei into large oxide precipitates having an IG capability, the wafer may be additionally subjected to heat treatment at about 1000° C. There is generally called DZ-IG treatment a combination of the three types of heat treatment, that is, the heat treatment out-diffusing oxygen residing in the vicinity of the wafer surface, the heat treatment generating oxygen precipitation nuclei in the interior of the wafer, and the heat treatment growing the oxygen precipitation nuclei.
With the DZ-IG treatment, an ideal structure is formed in which there are no oxide precipitates in the vicinity of a wafer surface to be a device fabrication region, while there are generated oxide precipitates having an IG capability in the interior thereof (hereinafter the structure may be referred to as a DZ-IG structure). However, this treatment is long in the total process for heat treatment, resulting in poor efficiency.
Also, a general CZ wafer contains void-like defects generated by aggregation of atomic vacancies in addition to grown-in precipitation nuclei. When the void defect is exposed on a surface of a mirror-polished wafer, they are observed as surface pits called COP (crystal originated particle). When the COPs and voids are present in the device fabrication region, degradation of the device characteristics occurs too. For this reason, in order to eliminate the COPs and voids in the vicinity of the wafer surface, the wafer may be subjected to high-temperature heat treatment at a temperature of the order of 1200° C. or higher in hydrogen or argon atmosphere.
However, in this case, a problem arises that thermal stress causes slip generation. In order to suppress slip generation, a temperature of heat treatment is desirably lower, while at lower heat treatment temperatures, the COPs and voids are harder to be eliminated.
Further, in this case as well, an IG capability is preferably to be imparted. Then, as a method in which annihilation of the COPs and voids in the vicinity of a wafer surface and generation of oxide precipitates in the interior of the wafer are simultaneously realized, there has been known a method in which nitrogen is added during crystal growth. In a wafer added with nitrogen, smaller voids are easily annihilated by high-temperature heat treatment, while larger grown-in precipitation nuclei grow without annihilation even in high-temperature treatment into oxide precipitates, thereby an IG capability being imparted.
However, even when a wafer added with nitrogen is used, there is no change in that it is necessarily subjected to high-temperature heat treatment at about 1200° C. As the wafer diameter becomes larger, the slip more easily generates; therefore especially in a 300 mm wafer that is the mainstream hereafter, there becomes a great problem need of high-temperature heat treatment at about 1200° C. or higher.
Further, since the area where void defects are annihilated is in a very thin surface layer of the order of several μm from the surface, the void defects may degrade device characteristics in a device using a surface layer deeper than the very thin surface layer as a device fabrication region.
In order to bring a device fabrication region in the vicinity of a wafer surface into a defect-free state, there may be used an epitaxial wafer (hereinafter may be referred to as an epi wafer) that is manufactured by depositing silicon single crystal on a silicon wafer as an epitaxial growth substrate by means of vapor phase growth. In this epi wafer, it is also important to impart an IG capability to the substrate.
However, since a usual epitaxial step (hereinafter may be referred to as an epi step) is operated at a high-temperature of about 1100° C. or higher, most oxygen precipitation nuclei (grown-in precipitation nuclei) in the substrate generated in a crystal thermal history are annihilated and thereby no oxide precipitates are generated in the subsequent device fabrication process. Accordingly, in an epi wafer, there arises a problem that an IG capability deteriorates.
As a solution of this problem, there has been known a method in which by performing heat treatment at about 800° C. prior to an epi step, grown-in precipitation nuclei generated in a crystal thermal history are grown to sizes not to be annihilated even in a high-temperature epi step. In this method, when a heat treatment temperature prior to epi growth is 800° C., grown-in precipitation nuclei with sizes equal to or larger than a critical size (the minimum size of a precipitation nucleus that can stably grow at the temperature) at 800° C. grow and survive during an epi step, and the survived nuclei further grow into oxide precipitates in heat treatment such as a device fabrication process after the epi step.
In general, density of small grown-in precipitation nuclei is higher, while density of large grown-in precipitation nuclei is lower. Furthermore, the lower the heat treatment temperature is, the smaller the critical size becomes. Therefore, in order to generate grown-in precipitation nuclei at higher density for imparting a more excellent IG capability, it is desirable to lower the heat treatment temperature prior to the epi step. However, if the heat treatment temperature is lowered, a growth rate of precipitation nuclei is slowed, so a long time of heat treatment is required for growing the precipitation nuclei to sizes not to be annihilated even in an epi step, which is not preferable because of reduction in productivity.
Furthermore, if there exist oxide precipitates having sizes not to be annihilated even in an epi step, in a recent device fabrication process having a lower temperature and a shorter time, no further growth of the oxide precipitates can be expected in heat treatment of the device fabrication process. In order to exert a gettering capability in such a recent device fabrication process, it is necessary to generate oxide precipitates with sizes having a gettering capability at high density prior to the device fabrication process.
As described above, in the recent device fabrication process, a trend of a lower temperature and a shorter time in a device fabrication process has progressed in company with the use of a larger-size wafer therein; for example, a series of steps in the device fabrication process are all performed at a temperature of 1000° C. or lower, and RTP (rapid thermal processing) requiring only a heat treatment time of the order of some tens of seconds has frequently been employed. In such a device fabrication process, the total heat treatment is no more than equal to heat treatment at 1000° C. for about 2 hrs so that growth of oxide precipitates as in a conventional process cannot be expected during the device fabrication process.